With the recent advances in performance of information processing systems, gigabit-per-second (Gbps) class serial signaling using a differential signal has been widespread. Such a higher-speed signal, however, leads to a noticeable waveform deterioration due to impedance mismatch (discontinuous structure).
Most of the high-speed serial transmission standards therefore require that reflection characteristics fall below a prescribed value in a wide frequency range.
In the case of a transmission device using differential lines, on the other hand, it is known that a parasitic inductance may be generated in a package or a module because wire bonding is used to connect a mounted chip to board wiring.
It is also known that a parasitic capacitance may be generated between the differential lines because an in-phase signal and an inverted-phase signal are often made in close proximity to each other in order to increase the signal density in a bump of a chip, a solder ball of a package, and a differential through hole in a PCB board.
As the signal frequency band becomes higher, the impedance mismatch due to those parasitic components becomes more noticeable to deteriorate the reflection characteristics. It has therefore become more difficult to satisfy a reflection prescribed value of the standards, which is one major problem.
In view of the above, the technology for achieving impedance match by a capacitance circuit and the technology of using an input/output terminal of an IC as an impedance transformer have hitherto been proposed as the countermeasure for the problem (see, for example, Patent Literature 1 and Patent Literature 2).